RLC effects on worst-case switching pattern for on-chip buses

Tu, S.-W.S.-W.TuJou, J.-Y.J.-Y.JouYAO-WEN CHANG2018-09-102018-09-102004http://www.scopus.com/inward/record.url?eid=2-s2.0-4344685471&partnerID=MN8TOARShttp://scholars.lib.ntu.edu.tw/handle/123456789/309292RLC effects on worst-case switching pattern for on-chip busesconference paper2-s2.0-4344685471