Signal/Power integrity modeling of high-speed memory modules using chip-package-board co-analysis

YI-CHANG LUTZONG-LIN WUHSIN-SHU CHENRUEY-BEEI WU2018-09-102018-09-102010-05http://scholars.lib.ntu.edu.tw/handle/123456789/359406Signal/Power integrity modeling of high-speed memory modules using chip-package-board co-analysisjournal article10.1109/temc.2010.20431082-s2.0-77952745139WOS:000277881800013