國立臺灣大學電機工程學系藍浩濤2006-09-282018-07-062006-09-282018-07-06http://ntur.lib.ntu.edu.tw//handle/246246/2006092815521091DLL usually implements with logic and analog circuit in ASIC design. CPLD and FPGA are logic devices,and must design DLL or PLL to implement in devices design first. Could we create a simple DLL circuit with VHDL or Verilog implementing in CPLD, FPGA or ASIC ?application/ppt692224 bytesapplication/vnd.ms-powerpointzh-TW全新架構的全數位式無類比鎖相倍頻電路Create DLL circuit and Multiple frequency with VHDL or VERILOG in CPLD,FPGA or ASICreporthttp://ntur.lib.ntu.edu.tw/bitstream/246246/2006092815521091/1/lance.ppt