A hybrid DRAM/PCM buffer cache architecture for smartphones with QoS consideration

Lin, Y.-J.Y.-J.LinYang, C.-L.C.-L.YangLi, H.-P.H.-P.LiWang, C.-Y.M.C.-Y.M.WangCHIA-LIN YANG2020-05-042020-05-042016https://scholars.lib.ntu.edu.tw/handle/123456789/487728A hybrid DRAM/PCM buffer cache architecture for smartphones with QoS considerationjournal article10.1145/2979143https://www.scopus.com/inward/record.uri?eid=2-s2.0-85008936689&doi=10.1145%2f2979143&partnerID=40&md5=f7e07bafa1c776c982b2db4bfc8f103c