Wang, I-HsinI-HsinWangLee, Hwei-YuHwei-YuLeeSHEN-IUAN LIU2011-10-072018-07-102011-10-072018-07-10200915497747http://scholars.lib.ntu.edu.tw/handle/123456789/352071http://ntur.lib.ntu.edu.tw/bitstream/246246/237195/-1/09.pdfAn 8-bit 20-MS/s time-domain analog-to-digital data converter (ADC) using the zero-crossing-based circuit technique is presented. Compared with the conventional ADCs, signal processing is executed in both the voltage and time domains. Since no high-gain operational amplifier is needed, this time-domain ADC works well in a low supply voltage. The proposed ADC has been fabricated in a 0.18-μm CMOS process. Its power dissipation is 4.64 mW from a supply voltage of 1.8 V. This active area occupies 1.2 × 0.7 mm2. The measured signal-to-noise-distortion ratio achieves 44.2 dB at an input frequency of 10 MHz. The integral nonlinearity is less than ±1.07 LSB, and the differential nonlinearity is less than ±0.72 LSB. This time-domain ADC achieves the effective bits of 7.1 for a Nyquist input frequency at 20 MS/s. © 2009 IEEE.Analog-to-digital converter (ADC); Delay-locked loop (DLL); Time domain; Zero-crossing-based circuit (ZCBC)Analog to digital conversion; Delay lock loops; Modulators; Operational amplifiers; Signal processing; Signal to noise ratio; Analog to digital converters; Analog-to-digital data converters; Delay-locked loops; Differential nonlinearity; Integral nonlinearity; Low supply voltages; Time domain; Zero-crossings; Time domain analysisjournal article10.1109/TCSII.2009.2022208http://ntur.lib.ntu.edu.tw/bitstream/246246/237195/-1/09.pdf