A 1.7~3.125Gbps clock and data recovery circuit using a gated frequency detector

Yang, Rong-JyiRong-JyiYangLiu, Shen-IuanShen-IuanLiu2007-04-192018-07-062007-04-192018-07-062004-08http://scholars.lib.ntu.edu.tw/handle/123456789/310606http://ntur.lib.ntu.edu.tw/bitstream/246246/200704191002727/1/01349486.pdf353501 bytesapplication/pdfA 1.7~3.125Gbps clock and data recovery circuit using a gated frequency detectorconference paper10.1109/apasic.2004.1349486http://ntur.lib.ntu.edu.tw/bitstream/246246/200704191002727/1/01349486.pdf