黃俊郎臺灣大學:電子工程學研究所羅偉倫Lo, Wei-LungWei-LungLo2007-11-272018-07-102007-11-272018-07-102005http://ntur.lib.ntu.edu.tw//handle/246246/57377在IC設計流程 媗褌狺w成為主要的瓶頸,其中一個困難點是要如何確定RTL程式碼正確性,針對靜態畫面壓縮的矽智財,本文提出一個可以得到極高驗證覆蓋率的試圖騰架構. 在此架構內,模板以相同大小的方塊組成,方塊內有高,低頻的成分. 這些高低頻成分的比例和位置都以模擬退火演算法決定. 此方法用在四個影像處理編解碼矽智財上,並把用此方法得到的驗證覆蓋率,和其他設計者提供, 或傳統圖騰得到的驗證覆蓋率作比較,結果都是本文提出的方法能得到最好的效果Verification has become the bottleneck in the hardware design process, and one of the hardest verification problems is to verify the correctness of the RTL code. In this paper, a testbench configuration to obtain high toggle coverage for still CODEC image IP's is proposed. In the configuration, an image template composed of key image characteristics, e.g., high and low spatial frequency components, is proposed as the basic building block of the testbench. The parameters of each building block, including the ratio and location of the high/low frequency components, are determined by simulated annealing. The proposed testbench is applied to four image CODEC IPs. Compared to the designer-provided image, commonly used verification images and random images, the testbench generated by proposed method can achieve the highest toggle coverage.Table of Contents Abstract ii List of Tables v List of Figures vi Chapter 1. Introduction 1 Chapter 2. Preliminaries 5 2.1 Common characteristics of still-image CODEC algorithms . 5 2.2 Simulated annealing . . . . . . . . . . . . . . . . . . . . . . 6 2.3 Random number generation . . . . . . . . . . . . . . . . . . 8 Chapter 3. The proposed testbench generation algorithm 9 3.1 The testbench generation flow . . . . . . . . . . . . . . . . . 9 3.2 The block template . . . . . . . . . . . . . . . . . . . . . . 10 3.3 The testbench configuration and the pertubation function . 14 3.3.1 The square values perturbation function . . . . . . . . 14 3.3.2 DCS coefficients perturbation function . . . . . . . . . 15 3.3.3 The square size & location perturbation function . . . 16 3.3.4 Testbench rotation angle. . . . . . . . . . . . . . . . . 19 3.4 The cooling schedule . . . . . . . . . . . . . . . . . . . . . . 19 3.5 The cost function . . . . . . . . . . . . . . . . . . . . . . . . 20 Chapter 4. Experiment 21 4.1 The image CODEC IP’s . . . . . . . . . . . . . . . . . . . . 21 4.2 Experimental results . . . . . . . . . . . . . . . . . . . . . . 22 4.2.1 De-blocking IP . . . . . . . . . . . . . . . . . . . . . . 25 4.2.2 DWT IP . . . . . . . . . . . . . . . . . . . . . . . . . 31 4.2.3 AE IP . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 4.2.4 JPEG IP . . . . . . . . . . . . . . . . . . . . . . . . . 37 Chapter 5. Conclusion 41 Bibliography 42 List of Tables 4.1 De-blocking IP coverage. . . . . . . . . . . . . . . . . . 28 4.2 DWT IP coverage. . . . . . . . . . . . . . . . . . . . . 31 4.3 AE IP coverage. . . . . . . . . . . . . . . . . . . . . . . 34 4.4 JPEG IP coverage. . . . . . . . . . . . . . . . . . . . . 37 List of Figures 1.1 Simulation-based verification . . . . . . . . . . . . . . . 4 2.1 Simulated annealing concept . . . . . . . . . . . . . . . 7 3.1 The testbench generation flow . . . . . . . . . . . . . . 10 3.2 The testbench configuration and the block template. . 11 3.3 Example of Discrete Cosine Series vector for b=8 . . . 12 3.4 DCS basis vector. . . . . . . . . . . . . . . . . . . . . . 12 3.5 Shifted DCS basis vector. . . . . . . . . . . . . . . . . 13 3.6 Perturbation of square values. (show low frequency part only) . . . . . . . . . . . . . . . . . . . . . . . . . 15 3.7 Flow of DCS coefficient perturbation . . . . . . . . . . 17 3.8 Pertubation of constant-value squares. . . . . . . . . . 18 3.9 Square size perturbation rule: never exceeds block bound- ary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.10 Square location perturbation rule: never exceeds block boundary . . . . . . . . . . . . . . . . . . . . . . . . . 19 4.1 Lena (256 × 256 pixels). . . . . . . . . . . . . . . . . . 23 4.2 Baboon (256 × 256 pixels). . . . . . . . . . . . . . . . . 23 4.3 Pepper (256 × 256 pixels). . . . . . . . . . . . . . . . . 24 4.4 De-block IP testbench: Children-1 (352 × 288 pixels), with blocking effects. . . . . . . . . . . . . . . . . . . . 25 4.5 De-block IP testbench: Children-2 (352 × 288 pixels), with blocking effects. . . . . . . . . . . . . . . . . . . . 26 4.6 De-block IP testbench: Foreman (352 × 288 pixels), with blocking effects. . . . . . . . . . . . . . . . . . . . 26 4.7 Initial testbench configuration for the de-blocking IP (352 × 288 pixels). . . . . . . . . . . . . . . . . . . . . 27 4.8 Final testbench configuration for the de-blocking IP (352 × 288 pixels). . . . . . . . . . . . . . . . . . . . . 27 4.9 Deblocking IP toggle coverage under different-size test- bench w.r.t. different testbench sizes . . . . . . . . . . 29 4.10 Deblocking IP condition coverage under different-size testbench . . . . . . . . . . . . . . . . . . . . . . . . . 30 4.11 Deblocking IP source coverage under different-size test- bench . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 4.12 Deblocking IP FSM coverage under different-size test- bench . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 4.13 DWT IP toggle coverage under different-size testbench 32 4.14 DWT IP condition coverage under different-size testbench 33 4.15 DWT IP source coverage under different-size testbench 33 4.16 AE IP toggle coverage under different-size testbench . . 35 4.17 AE IP condition coverage under different-size testbench 35 4.18 AE IP source coverage under different-size testbench . 36 4.19 JPEG IP toggle coverage under different-size testbench 38 4.20 JPEG IP condition coverage under different-size test- bench . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 4.21 JPEG IP source coverage under different-size testbench 39591161 bytesapplication/pdfen-US驗證矽智財影像處理verificationtestbenchgenerationstill-imageIP針對影像處理智財之覆蓋率導向驗證平台架構Coverage directed testbench generation for still image CODEC IP'sthesishttp://ntur.lib.ntu.edu.tw/bitstream/246246/57377/1/ntu-94-R92943057-1.pdf