Highly Concurrent Algorithm and Pipelined VLSI Architecture for Solving Covariance Systems

Jou, I. C.I. C.JouHu, Y. H.Y. H.Hu于惠中馮武雄Yu, Hui-JungHui-JungYuFeng, Wu-ShiungWu-ShiungFeng2009-02-042018-07-062009-02-042018-07-061985http://ntur.lib.ntu.edu.tw//handle/246246/121409en-USHighly Concurrent Algorithm and Pipelined VLSI Architecture for Solving Covariance Systemsconference paper