National Taiwan University DEPT ELECT ENGNYeh, C.C.C.C.YehLou, J.H.J.H.LouJAMES-B KUO2006-11-142018-07-062006-11-142018-07-061997-07https://www.scopus.com/inward/record.uri?eid=2-s2.0-0031191149&doi=10.1049%2fel%3a19970915&partnerID=40&md5=6b243bd14916c27edf7c638280f431bfA 1.5V full-swing energy efficient logic circuit is reported that is suitable for next-generation low-power VLSI applications using a low supply voltage. At 25MHz and at 1.5V, the power consumption of the EEL circuit is 70% of that for an ECRL circuit and 47% of that for the static circuit.application/pdf275916 bytesapplication/pdfzh-TWVLSICMOS integrated circuitslogic circuits[SDGs]SDG71.5 V CMOS full-swing energy efficient logic (EEL) circuit suitable for low-voltage and low-power VLSI applicationsjournal article10.1049/el:199709152-s2.0-0031191149http://ntur.lib.ntu.edu.tw/bitstream/246246/200611150121377/1/9843.pdf