Dept. of Electr. Eng., National Taiwan Univ.Leu, Yuh-RongYuh-RongLeuChen, Ing-YiIng-YiChenKuo, Sy-YenSy-YenKuo2007-04-192018-07-062007-04-192018-07-061993-10http://ntur.lib.ntu.edu.tw//handle/246246/2007041910032379http://ntur.lib.ntu.edu.tw/bitstream/246246/2007041910032379/1/00397139.pdfSeveral new algorithms for matrix-matrix multiplications on hypercube multiprocessors are presented and evaluated based on the number of multiplications, additions, and transfers. The matrices to be multiplied are uniformly distributed to all processors of a hypercube system. Each processor owns some submatrices which are derived by dividing the source matrices. Each submatrix multiplication can now be performed independently within a processor. All the partial results are then summed up and transferred to a single processor. An orthogonal tree is used for efficient communication. The time complexity is O(log/sub 2/p) if p /spl times/ p processors are used. In addition, the UDD (Uniform Data Distribution) approach is employed when some processors do not work properly and the faulty effects have been detected. Two classes of fault patterns are considered and evaluated.>application/pdf208344 bytesapplication/pdfen-USMatrix-matrix multiplications and fault tolerance on hypercube multiprocessorsjournal article10.1109/ASAP.1993.397139http://ntur.lib.ntu.edu.tw/bitstream/246246/2007041910032379/1/00397139.pdf