National Taiwan University Dept Elect EngnYAO-WEN CHANGLin, Shih-PingShih-PingLin2006-11-142018-07-062006-11-142018-07-062004-0502780070http://ntur.lib.ntu.edu.tw//handle/246246/200611150121528http://ntur.lib.ntu.edu.tw/bitstream/246246/200611150121528/1/5213.pdfhttps://www.scopus.com/inward/record.uri?eid=2-s2.0-2542428408&doi=10.1109%2fTCAD.2004.826547&partnerID=40&md5=479479a3be9587f0cc50718699931008In this paper, we propose a novel framework for multilevel full-chip routing considering both routabilityand performance called MR. The two-stage multilevel framework consists of coarsening, followed byuncoarsening. Unlike the previous multilevel routing, MR integrates global routing, detailed routing, and resource estimation, together at each level of the framework, leading to more accurate routing resource estimation during coarsening and thus facilitating the solution refinement during uncoarsening. Further, the exact routing information obtained at each level makesMR more flexible in dealing with various routing objectives (such as crosstalk, power, etc.). Experimental results show that MR obtains significantlybetter routing solutions than previous works. For example, for a set of 11 commonlyused benchmark circuits,MRachieves 100% routing completion for all circuits, while the previous multilevel routing, the three-level routing, and the hierarchical routing can complete routing for only2, 0, 2 circuits, respectively. In particular, the number of routing layers used by MR is even smaller.We also have performed experiments on timing-driven routing. The results are also verypr omising.application/pdf485320 bytesapplication/pdfzh-TWDetailed routingestimationglobal routinglayoutphysical designroutingtiming optimizationEstimation; Iterative methods; Linear programming; Optimization; Routers; Simulated annealing; VLSI circuits; Detailed routing; Global routing; Layouts; Physical design; Routing; Timing optimization; Microprocessor chipsjournal article10.1109/TCAD.2004.826547WOS:000221216000015http://ntur.lib.ntu.edu.tw/bitstream/246246/200611150121528/1/5213.pdf