陳永耀臺灣大學：電機工程學研究所陳宗裕Chen, Chung-YuChung-YuChen2007-11-262018-07-062007-11-262018-07-062004http://ntur.lib.ntu.edu.tw//handle/246246/53363本論文提出一新式部份乘積結構適應性濾波器,應用於生醫訊號處理.此部份乘積結構適應性濾波器將整合其他元件,且嵌入於人體.用於收集人體之生理訊號,加以處理,並傳輸至外界.為了嵌入至人體,所以晶片面積及功律消耗須特別注意. 本論文提出之部份乘積結構適應性濾波器,即針對晶片面積依據折疊演算法, Horner法則,樹狀高度演算法則,且提出一新式部份乘積結構演算法,作最佳化處理.此新式部份乘積結構適應性濾波器,可降低一般適應性濾波器約30%的晶片面積,並在可接受的速度下運作.論文中並對適應性訊號處理,適應性濾波器在大型積體電路的實現作詳細的介紹.最後並提出軟體模擬及硬體實現之結果.In this thesis, we proposed a Novel Partial Product Structure (PPS) Adaptive Filter, which is used in processing the biomedical signal from human physiology. This PPS adaptive filter is part of a biochip which will be implanted into a human body. In order to implant this biochip into human bodies, low power and small size are requested. We developed a Novel Partial Product Structure Adaptive Filter. This PPS adaptive filter is suitable for biomedical signal processing. We used folding algorithm, Horner’s rule, and Tree-height algorithm to optimize the area size. So, this PPS adaptive filter has optimized area size and acceptable operation speed for biomedical signal processing. In order to simulate this PPS adaptive filter, we choose noise canceller as our target. Noise canceller is a wildly used adaptive application in biomedical signal processing, voice signal processing, and digital communication. Also, we used Matlab as our algorithm simulation tool, ModelSim as our RTL level simulation tool. Finally, we used Altera Apex DSP Development Board to implement the conventional and PPS adaptive predictors. A comparison is introduced and shows that the proposed PPS algorithm has almost 30% reduction in chip size.Contents Chapter 1 Introduction 1 1.1 Adaptive Biomedical Signal Processing 2 1.2 Implementation of Adaptive Signal Processing 4 1.3 Thesis Outline 6 Chapter 2 Adaptive Signal Processing 7 2.1 Generic Adaptive Signal Processing 8 2.1.1 Mathematical Model 12 2.1.2 Cost Function 13 2.2 Methods of Optimization Algorithm 15 2.2.1 Least Squares 15 2.2.2 Least Mean Squares (LMS) Algorithm 17 2.3 Performance Analysis 21 2.3.1 Convergence 21 2.3.2 Misadjustment 24 2.3.3 Time Constant 24 2.4 Variants 25 Chapter 3 VLSI Implementation of PPS Adaptive Filter 29 3.1 Introduction of Low-Complexity Adaptive Filter 30 3.1.1 Low-Complexity Adaptive Filter 31 3.2 Architecture Optimization with folding algorithm 33 3.2.1 Folding Algorithm 33 3.2.2 LMS Update Algorithm Reduction with Folding Algorithm 36 3.3 Bit-Level Optimization with Horner’s Rule and Tree-Height Reduction 39 3.3.1 CSD Multiplication 39 3.3.2 Horner’s Rule for Precision Improvement 40 3.3.3 Tree-Height Reduction Rule for Latency Reduction 43 3.4 Partial Product Structure (PPS) Algorithm 45 3.4.1 N-bits*2 PPS Algorithm 45 3.4.2 10*10bits PPS Algorithm 46 Chapter 4 Software Simulation and Hardware Implementation 52 4.1 Adaptive Noise Canceller 53 4.2 Simulation Result 55 4.3 Verification 58 4.4 Hardware Implementation Environment 60 4.4.1 ALTERA APEX Starter DSP Development Board 60 4.4.2 Analog Oscilloscope and Logic Analyzer 63 4.5 FPGA Implementation 65 4.6 Hardware Comparison with Conventional LMS Algorithm 70 4.7 Feature Work 73 Chapter 5 Conclusion 74 Reference 751336909 bytesapplication/pdfen-US電路設計可適性濾波器adaptive filteric designthesishttp://ntur.lib.ntu.edu.tw/bitstream/246246/53363/1/ntu-93-P91921001-1.pdf