工學院: 材料科學與工程學研究所指導教授: 溫政彥沈慈賢Shen, Tzu-HsienTzu-HsienShen2017-03-032018-06-282017-03-032018-06-282016http://ntur.lib.ntu.edu.tw//handle/246246/273181介面分明且無缺陷的矽鍺異質介面具有許多優異的物理特性，使得此結構可以被應用於高效率半導體元件當中。然而薄膜結構中的矽鍺異質介面，往往會於交界處產生缺陷，使異質結構的電學與光學性質降低。將異質介面成長於奈米線中，可以大幅降低缺陷生成。本研究中，我們利用超高真空化學氣相沉積(ultra-high vacuum chemical vapor deposition, UHV-CVD)系統，以氣相-固相-固相(vapor-solid-solid, VSS)機制，成長出無介面缺陷、且異質介面明顯定義之矽鍺異質介面奈米線。高角度環形暗場掃描穿透式電子顯微鏡影像(high-angle annular dark-field scanning transmission electron microscope, HAADF-STEM)顯示，以金銀合金顆粒做為催化劑成長之矽-鍺-矽異質介面奈米線，其矽鍺異質介面處沒有觀察到缺陷的生成，且異質介面寬度大約為0.7 nm。幾何相位分析(geometric phase analysis, GPA)與電子能量損失光譜(electron energy-loss spectroscopy, EELS)結果均顯示，距離異質介面處數奈米內之矽晶格區有拉伸應變存在。為了後續元件應用性，我們試著將矽-鍺-矽異質介面奈米線成長於微米長度的矽奈米線上。此外，為了增加矽晶格區之應變，我們亦嘗試製備鍺-矽-鍺異質介面奈米線，發現預退火可以降低金奈米粒子之密度，使獨立、分散的鍺奈米線得以成長。Formation of abrupt and defect-free Si/Ge heterostructures is of great importance for device applications. One of the advantages of this structure is that the lattice strain due to the 4.18% lattice mismatch between Si and Ge may be helpful to improve the optoelectronic properties of the two materials. However, when such heterojunctions are fabricated in thin-film structures, misfit dislocations are inevitably formed at the heterointerfaces, losing the desired strain state. One approach to get rid of this obstacle is by growing the heterojunction in nanowires, in which the strain can be relaxed elastically. The aim of this study is to grow nearly perfect Si/Ge heterojuncitons in nanowires with sufficient understanding of the controls of their morphology, composition, interfacial abruptness, and strain field near the interface. An ultra-high vacuum chemical vapor deposition (UHV-CVD) reactor is used for the nanowire growth, and it is equipped with in-situ metal evaporation systems for preparing the catalysts. In order to create compositionally abrupt Si/Ge interfaces, AgAu solid catalysts are used to fabricate Si/Ge/Si heterojunction nanowires via the vapor-solid-solid (VSS) mechanism. The high-angle annular dark-field scanning transmission electron microscopy (HAADF-STEM) analysis shows that the Si/Ge heterointerface can be as sharp as merely 1 nm and no misfit dislocations are observed at the heterointerface; therefore, coherent strains are produced in the lattice near the interface and the strain distribution is quantitatively measured using the geometric phase analysis (GPA) method. The strain effect on the electronic property of Si is revealed in electron energy-loss spectroscopy (EELS) analysis – a slight shift of the loss energy is observed in the strained silicon lattice. For applications, the heterojunction nanowires should be long enough for device fabrication and we therefore use a two-step growth method using AgAu alloy catalysts: a long Si nanowires is grown via the vapor-liquid-solid (VLS) method and Si/Ge/Si heterojunctions are subsequently grown via the VSS method on the Si nanowires. In order to create a larger strain in Si lattice, we propose to grow Ge/Si/Ge heterojunction nanowires. Yet, the Ge nanowires can be grown using Au as the catalysts and it is found that the individual Ge nanowires are fabricated with the use of disperse AuSi eutectic droplets prepared by a pre-annealing treatment.4841480 bytesapplication/pdf論文公開時間: 2016/8/25論文使用權限: 同意無償授權矽鍺異質介面奈米線氣相-固相-固相成長機制氣相-液相-固相成長機 制穿透式電子顯微鏡幾何相位分析技術電子能量損失光譜Si/Ge heterojunction nanowiresvapor-liquid-solid (VLS)vapor-solid-solid (VSS)transmission electron microscopy (TEM)geometric phase analysis (GPA)electron energy-loss spectroscopy (EELS)thesis10.6342/NTU201602478http://ntur.lib.ntu.edu.tw/bitstream/246246/273181/1/ntu-105-R03527019-1.pdf