A 3.2GHz digital phase-locked loop with background supply-noise cancellation

Yeh, C.-W.C.-W.YehHsieh, C.-E.C.-E.HsiehSHEN-IUAN LIU2020-06-112020-06-112016https://scholars.lib.ntu.edu.tw/handle/123456789/499864[SDGs]SDG7A 3.2GHz digital phase-locked loop with background supply-noise cancellationconference paper10.1109/ISSCC.2016.74180422-s2.0-84962844424https://www.scopus.com/inward/record.uri?eid=2-s2.0-84962844424&doi=10.1109%2fISSCC.2016.7418042&partnerID=40&md5=5ce336fe2310e91d11806ba6f36e6c55