Hardware-accelerated cache simulation for multicore by FPGA

Hung, S.-H.S.-H.HungHo, Y.-M.Y.-M.HoYeh, C.-W.C.-W.YehCheng-Yueh, Lee, C.-P.Lee, C.-P.Cheng-YuehSHIH-HAO HUNG2020-05-042020-05-042018https://scholars.lib.ntu.edu.tw/handle/123456789/489629Hardware-accelerated cache simulation for multicore by FPGAconference paper10.1145/3264746.3264766https://www.scopus.com/inward/record.uri?eid=2-s2.0-85056806465&doi=10.1145%2f3264746.3264766&partnerID=40&md5=2082aefc9e510d8a51c44cdde0c2e79f