A clock-fault tolerant architecture and circuit for reliable nanoelectronics system

AN-YEU(ANDY) WUAng, W.T.W.T.AngRao, H.F.H.F.RaoYu, C.C.YuLiu, J.J.LiuWey, I.-C.I.-C.WeyWu, A.-Y.A.-Y.WuZhao, H.H.ZhaoChen, J.J.ChenAN-YEU(ANDY) WU2018-09-102018-09-102007http://www.scopus.com/inward/record.url?eid=2-s2.0-48349141207&partnerID=MN8TOARShttp://scholars.lib.ntu.edu.tw/handle/123456789/332572A clock-fault tolerant architecture and circuit for reliable nanoelectronics systemconference paper10.1109/DTIS.2007.4449516