Tu, Chien TeChien TeTuLiu, Yi ChunYi ChunLiuChen, Yu RuiYu RuiChenHuang, Bo WeiBo WeiHuangCheng, Chun YiChun YiChengCHEE-WEE LIU2023-08-212023-08-212023-01-019798350334166https://scholars.lib.ntu.edu.tw/handle/123456789/634633Beyond 3 nm node, the transition of transistor architecture from FinFETs to stacked channel gate-all-around FETs occurs due to enhanced power, performance, and area by the improved short channel control and drive current per footprint. High ION and small parasitic RC are the keys to extend nanosheet technologies for N+1 and N+2 nodes. To extend nanosheets to next nodes, we demonstrated additional enabling knobs such as high mobility channels, high-κ gate dielectrics, and highly stacked channels to effectively increase the ION. Beyond stacked nanosheets, new transistor architectures such as TreeFET (a combination of FinFET and stacked nanosheets) and CFET (stacked n and p FETs) can further enable cell height scaling for parasitic RC reduction. CFETs and atomic channels have potentials to be used in A5 and A2 nodes according to the transistor roadmap by IMEC [1], respectively. Note that ultrathin body as thin as 1 nm can be considered as atomic channels for nearly ideal SS.conference paper10.1109/VLSI-TSA/VLSI-DAT57221.2023.101342582-s2.0-85162960214https://api.elsevier.com/content/abstract/scopus_id/85162960214