Low voltage BiCMOS dynamic logic gates

Dept. of Electr. Eng., National Taiwan Univ.Wu, Yan-PeiYan-PeiWuChen, H. P.H. P.Chen2007-04-192018-07-062007-04-192018-07-061994-10N/Ahttp://ntur.lib.ntu.edu.tw//handle/246246/2007041910042605application/pdf201863 bytesapplication/pdfen-USLow voltage BiCMOS dynamic logic gatesjournal articlehttp://ntur.lib.ntu.edu.tw/bitstream/246246/2007041910042605/1/00329981.pdf