Analysis and design of macroblock pipelining for H.264/AVC VLSI architecture

Chen, T.-C.T.-C.ChenHuang, Y.-W.Y.-W.HuangChen, L.-G.L.-G.ChenLIANG-GEE CHEN2018-09-102018-09-102004http://www.scopus.com/inward/record.url?eid=2-s2.0-4344715021&partnerID=MN8TOARShttp://scholars.lib.ntu.edu.tw/handle/123456789/307063Analysis and design of macroblock pipelining for H.264/AVC VLSI architectureconference paper