2024-05-182024-05-1814304https://scholars.lib.ntu.edu.tw/handle/123456789/718148design verification for SoCsdesign for verifiabilitydesign automation and optimizationand constraint satisfaction problems in electronic design automation (EDA) areaSoC電路設計驗證電路設計自動化及最佳化可驗證性電路設計Constraint Satisfication問題CHUNG-YANG HUANG