Kuo, J.-L.J.-L.KuoTsai, Z.-M.Z.-M.TsaiHUEI WANG2020-06-042020-06-042008https://scholars.lib.ntu.edu.tw/handle/123456789/497444A 24 GHz, 19.1 dBm fully-integrated power amplifiers (PA) was designed and fabricated in the 0.18-iquestm deep n-well (DNW) CMOS technology. This power amplifier is a 2-stage design using cascode RF NMOS configuration and has a maximum measured output power of 19.1 dBm, an OP 1dB of 13.3 dBm, a power added efficiency (PAE) of 15.6%, and a linear gain of 18.8 dB when V DD and DNW are both biased at 3.6 V. The chip size is only 0.56 times 0.58 mm 2 . To the author's knowledge, this PA demonstrates the highest output power of +19.1 dBm among the reported PAs above 15 GHz in CMOS processes.[SDGs]SDG7conference paper10.1109/EUMC.2008.47517332-s2.0-62449204614https://www.scopus.com/inward/record.uri?eid=2-s2.0-62449204614&doi=10.1109%2fEUMC.2008.4751733&partnerID=40&md5=5c5b0af5a8dc68bca8eb469214e587d2