A 0.6 V low-power wide-range delay-locked loop in 0.18 ?m CMOS

Lu, Chung-TingChung-TingLuHsieh, Hsieh-HungHsieh-HungHsiehLu, Liang-HungLiang-HungLu2011-10-132018-07-102011-10-132018-07-102009http://ntur.lib.ntu.edu.tw//handle/246246/237215en-USA 0.6 V low-power wide-range delay-locked loop in 0.18 ?m CMOSjournal articlehttp://ntur.lib.ntu.edu.tw/bitstream/246246/237215/-1/09.pdf