Chen, K.-Y.K.-Y.ChenChen, W.-Y.W.-Y.ChenSHEN-IUAN LIU2020-06-112020-06-11201715497747https://scholars.lib.ntu.edu.tw/handle/123456789/499889https://www.scopus.com/inward/record.uri?eid=2-s2.0-85020307240&doi=10.1109%2fTCSII.2016.2599528&partnerID=40&md5=68038a3dd04d00836586946677da4ab0A 20-Gb/s adaptive linear equalizer with a coefficient fast-converging method is presented. By using the asynchronous sampling technique, the power dissipation of the circuits, realizing the adaptation method, can be reduced. However, the equalization coefficients require a considerable amount of time to be determined. To shorten the asynchronous sampling time, the high-frequency gain of the linear equalizer is calibrated prior to the low-frequency one. With a 20-Gb/s pseudorandom binary sequence of 27-1, the measured bit-error-rates are all less than 10-12 for channel loss from-7.98 to-18.3 dB. Moreover, the equalization coefficients are determined within 2.68 μs . Fabricated in a 40-nm CMOS technology, this equalizer totally consumes 12.8 mW from a 1.1-V supply, of which only 4.9 mW dissipates in the circuits, realizing the proposed method. The calculated figure-of-merit is 0.035-pJ/bit/dB. © 2004-2012 IEEE.Adaptive equalizer; asynchronous sampling; fast converging; linear equalizerBinary sequences; Adaptation methods; Adaptive equalizer; Asynchronous sampling; fast converging; Figure of merits; High frequency gain; Linear equalizer; Pseudo-random binary sequences; Equalizersjournal article10.1109/TCSII.2016.25995282-s2.0-85020307240https://www.scopus.com/inward/record.uri?eid=2-s2.0-85020307240&doi=10.1109%2fTCSII.2016.2599528&partnerID=40&md5=68038a3dd04d00836586946677da4ab0