Lo CFeng Z.-LHuang W.-LCHEE-WEE LIUChen T.-LChou C.-H.2023-06-092023-06-09201621686734https://www.scopus.com/inward/record.uri?eid=2-s2.0-84984706674&doi=10.1109%2fJEDS.2016.2562675&partnerID=40&md5=130f89ed26a24ba6513736fcba8a6b8dhttps://scholars.lib.ntu.edu.tw/handle/123456789/632212The negative bias stress normally yields a negative threshold voltage shift of the thin film transistors due to the additional positive charges trapped in the gate dielectrics or at channel/gate insulator interface. However, a positive threshold voltage shift of the device with the post InGaZnO deposition annealing at 400 °C is observed in our devices. The Na+ incorporation from Mo gate into the gate dielectric after 400 °C annealing is responsible for this abnormal threshold voltage shift. The movement of Na+ ions toward the gate electrode by the negative gate bias decreases the distance between the gate electrode and the Na+ ions. Therefore, the voltage drop between the gate electrode and the Na+ ions reduces, and a corresponding positive threshold voltage shift is observed. Inserting a SiNx layer between the SiOx gate insulator and the Mo gate electrode can reduce the Na+ mobility, and thus a normal negative threshold voltage shift resumes. © 2013 IEEE.abnormal VT shift; InGaZnO; mobile charge; negative bias stress; thin film transistorAmorphous films; Bias voltage; Computer circuits; Dielectric materials; Electrodes; Gate dielectrics; Interfaces (materials); Ions; Reconfigurable hardware; Semiconducting organic compounds; Silicon nitride; Thin film circuits; Thin film transistors; Thin films; abnormal VT shift; Amorphous InGaZnO; Gate electrodes; InGaZnO; Mobile charge; Negative bias; Positive charges; Threshold voltage shifts; Threshold voltagejournal article10.1109/JEDS.2016.25626752-s2.0-84984706674