電機資訊學院: 電信工程學研究所指導教授: 王暉能繼康Nai, JI-KangJI-KangNai2017-03-062018-07-052017-03-062018-07-052016http://ntur.lib.ntu.edu.tw//handle/246246/276309在本論文中，我們將開關式功率放大器的理論運用到射頻金氧半場效電晶體(CMOS)積體功率放大器的設計中，設計著重於在大功率輸出時，進一步提升功率放大器的效率。 首先使用180奈米金氧半場效電晶體製程，設計了一顆5 GHz的變壓器結合的F-1模態功率放大器。設計中以變壓器和並聯電容代替習用的電容電感共振腔，以提高其功率密度。此功率放大器小信號增益達到13.2 dB, 飽和輸出功率25.4 dBm，以及最大輸出功率41%。同時在1-dB壓縮點的操作下，仍保持24.6 dBm的輸出功率， 以及35%的功率附加效率(PAE)。 而後使用相同製程，設計了一顆2.8-6 GHz的寬頻積體功率放大器。在此設計中的輸出匹配網路同時滿足了寬頻的基頻，以及二、三階諧波的阻抗匹配，以提高其效率。電路在整個頻寬內達到了10.4-13.4 dB的小訊號增益，同時具有20.8-22.1dBm的飽和輸出功率，以及37%-44%的最大輸出效率。當電路工作在1-dB壓縮點的時候，仍然有 20.3-21.4 dBm輸出功率以及32%-38%功率附加效率。In this thesis, the theory of switchmode power amplifier (PA) is implemented in the design of CMOS RF power amplifier. The aim of the design is to improve the efficiency of power amplifier while keeping high out output power. A 5 GHz class-F-1 mode power amplifier based on transformer using the TSMC 180-nm CMOS process is presented first. In this design, the conventional output matching networks of LC-tank are replaced by the transformer with a shunt capacitor to increase the power density. The measured result shows 13.2-dB small signal gain, and 25.4-dBm saturation power (Psat) and 41% peak power added efficiency (PAE). While the output power at 1-dB compression point (OP1dB) is 24.6 dBm, and the PAE at OP1dB is 35%. Then a power amplifier works from 2.8 to 6 GHz is also designed using 180-nm CMOS process. The output matching network of the proposed PA achieves wideband fundamental matching and 2nd and 3rd harmonic impedance matching to improve the efficiency simultaneously. The measured result shows 10.4-to-13.4-dB small signal gain, and 20.8-to-22.1-dBm Psat, and 37-44% peak PAE. In the meanwhile the OP1dB is 20.3-21.4 dBm, and the PAE at OP1dB is 32-38%.論文使用權限: 不同意授權功率放大器金氧半場效電晶體開關式放大器高效率F-1模態功率放大器Power amplifierCMOSswitchmode power amplifierhigh efficiencyclass-F-1 mode power amplifierthesis