High-performance three-dimensional on-chip inductors in SOI CMOS technology for monolithic RF circuit applications

Kim, JonghaeJonghaeKimPlouchart, Jean-OlivierJean-OlivierPlouchartZamdmer, NoahNoahZamdmerFong, NericNericFongLIANG-HUNG LUTan, YueYueTanJenkins, Keith A.Keith A.JenkinsSherony, MelanieMelanieSheronyGroves, RobertRobertGrovesKumar, MahenderMahenderKumarRay, AsitAsitRay2018-09-102018-09-102003-06http://scholars.lib.ntu.edu.tw/handle/123456789/304376https://www.scopus.com/inward/record.uri?eid=2-s2.0-0043162165&partnerID=40&md5=1d2e4ab05d36d4f508ad328a89e7d034This paper presents high-Q and high-inductance-density on-chip inductors fabricated on high-resistivity substrate (HRS) using a 0.12 μm SOI CMOS technology with 8 copper metal layers. A peak Q of 52 is obtained at 5 GHz for a 0.6 nH STP (Single-turn, multiple metal levels in Parallel) inductor. An inductance density of 5302 fH/μm2 is obtained for a 42 nH MTS (Multi-turn, multiple metal layers in Series) inductor.Electric inductors; Electric network analysis; Q factor measurement; Semiconductor device models; System on chip (SOC) technology; CMOS integrated circuitsHigh-performance three-dimensional on-chip inductors in SOI CMOS technology for monolithic RF circuit applicationsconference paper10.1109/rfic.2003.12140162-s2.0-0043162165