A parameterized SPICE macromodel of resistive random access memory and circuit demonstration

CHEE-WEE LIUChang, H.-L.H.-L.ChangLi, H.-C.H.-C.LiLiu, C.W.C.W.LiuChen, F.F.ChenTsai, M.-J.M.-J.TsaiCHEE-WEE LIU2018-09-102018-09-102011http://www.scopus.com/inward/record.url?eid=2-s2.0-80055008747&partnerID=MN8TOARShttp://scholars.lib.ntu.edu.tw/handle/123456789/365236A parameterized SPICE macromodel of resistive random access memory and circuit demonstrationconference paper10.1109/SISPAD.2011.6034967