Design and Chip Implementation of the Segment Weighted Random BIST for Low Power Testing

CHIEN-MO LIChun-Yi LeeCHIEN-MO LI2018-09-102018-09-102007-08http://scholars.lib.ntu.edu.tw/handle/123456789/334018Design and Chip Implementation of the Segment Weighted Random BIST for Low Power Testingjournal article10.1166/jolpe.2007.121