High-Performance VLSI Architecture of Decision Feedback Equalizer for Gigabit Systems

Chih-Hsiu LinAn-Yeu WuFan-Min LiAN-YEU(ANDY) WU吳安宇2019-10-242019-10-24200615497747https://scholars.lib.ntu.edu.tw/handle/123456789/427703High-Performance VLSI Architecture of Decision Feedback Equalizer for Gigabit Systemsjournal article10.1109/tcsii.2006.8811652-s2.0-34047103351