李泰成臺灣大學：電子工程學研究所駱彥宏lo, Yen-HungYen-Hunglo2007-11-272018-07-102007-11-272018-07-102005http://ntur.lib.ntu.edu.tw//handle/246246/57297當有線的區域網路多向高速的Gbps、10Gbps飛速前進時，無線區域網路也同時在提高其資料傳輸速率。IEEE於1999年制訂了兩套無線網路通訊協定，分別為802.11a及802.11b。其中802.11b以2.4 GHz的頻段為操作頻率，採用直接序列展頻與CCK調變技術作為調變模式，至今仍是市場主流商品的標準。然而2.4GHz的頻道已充滿各種的通訊標準，因此5GHz的頻帶可用來傳送一些中速到低速的資料，目標將以低功率為主要考量，而國外的一些研究機構及大學也有類似的研究在進行中，如UC Berkeley wireless research center有類似的超低功率無線網路計畫，可見低功率無線通訊是未來之趨勢。 本論文將著眼於無線通訊系統中，類比前端處理器內的correlator，以期達到我們低功率的目標。論文中的類比相關器使用0.18微米製程與1.5伏特的供給電壓，當類比相關器運作在一千六百萬赫茲時，僅消耗功率0.04毫瓦。此外，配合著類比相關器的架構，我們採用多重檢測法來模擬同步的機制，得到較快速卻不失準確的搜尋結果。When wired local area networks speeds up to Gbps and 10 Gbps, wireless local area networks (WLAN) raises its data rate at the same time. IEEE had established two sets of communication protocol of wireless networks which are 802.11a and 802.11b respectively in 1999. Among them, the operating frequency of 802.11b is used by the frequency band within 2.4 GHz and the modulation types are CDMA and CCK. Up to now, it is the standard in mainstream market. However, the frequency band within 2.4 GHz is full of every kind of communication standards and therefore the frequency band within 5 GHz can be used to transmit some of mid-speed and low-speed data. The goal is to achieve the consideration of low power and some research centers and collages in foreign countries are proceeding similar projects like UC Berkeley wireless research center having a similar ultra low-power wireless networks plan. It is clear that the low-power wireless communication is the trend in the future. In this thesis, we will focus on the correlator of analog front-end processor in wireless communication system to achieve our goal of low power. Designed in a 0.18-μm technology and powered 1.5-V supply voltage, the analog correlator operates at 16-MHz clock-rate while dissipating 0.04 mW. Besides, matching up to the architecture of analog correlator, we have simulated the synchronous strategy by multiple-dwell detection and obtained shorter acquisition time but proper degree of accuracy during acquisition.Table of Contents Table of Contents I List of Figures V List of Tables X Chapter 1 Introduction 1 1.1 Motivation 1 1.2 Thesis Overview 2 Chapter 2 DS-CDMA System Overview 4 2.1 Spread Spectrum 4 2.2 Multiple Access Techniques 5 2.2.1 Time- and Frequency-Division Duplexing 5 2.2.2 Frequency-Division Multiple Access 6 2.2.3 Time-Division Multiple Access 7 2.2.4 Code-Division Multiple Access 7 2.3 Spreading Codes for Direct-Sequence CDMA 10 2.3.1 Autocorrelation 10 2.3.2 Crosscorrelation 11 2.3.3 Families of Spreading Codes 12 2.4 Single User DSSS Modulation and Demodulation 14 Chapter 3 Design Consideration and Implementation of Analog Correlator 21 3.1 Basic Concepts 21 3.2 Partial Analog Correlation 22 3.2.1 Motivation 22 3.2.2 Proposed Specification in Partial Analog Correlation 23 3.3 Minimum Power Architecture 24 3.3.1 Active Chip-Rate Correlator 24 3.3.2 Passive Data-Rate Correlator 25 3.4 Nonideal Considerations in Passive SC Integration 26 3.4.1 Channel Charge Injection 26 3.4.2 Clock Feedthrough 29 3.4.3 KT/C Noise 30 3.5 Architecture of Analog Correlator 32 3.5.1 8-Cell Differential Sampling Cell 32 3.5.2 Control Signal Generation 35 3.5.3 Chip Implementation 38 Chapter 4 Simulation and Measurement Results of Analog Correlator 41 4.1 Gain Attenuation of Integration Step 41 4.2 Measurement Setup 43 4.2.1 A Glitch Problem from Function Generator 43 4.2.2 Measurement Environment 46 4.3 Simulation and Measurement Results 47 4.3.1 Input DC Signal to Chip 47 4.3.2 Change External Clock Frequency 49 4.3.3 Input Sinusoidal Signal to Chip 49 4.3.4 Output SNDR of Sinusoidal Input Signal 51 Chapter 5 Synchronization in DS-CDMA System 55 5.1 Introduction 55 5.2 Serial Search Technique 56 5.2.1 Fixed Integration Time Detection 56 5.2.2 Multiple-Dwell Detection 56 5.3 Multiple-Dwell Detection in Partial Analog Correlation 58 5.4 Channel Model 59 5.4.1 Multipath Fading Channel 61 5.4.2 AWGN 64 5.4.3 Carrier Frequency Offset 65 5.4.4 Timing Offset 66 5.5 Simulation Results 67 Chapter 6 Conclusion 73 Bibliography 756421460 bytesapplication/pdfen-US相關器直接序列分碼多工correlatorDS-CDMAthesishttp://ntur.lib.ntu.edu.tw/bitstream/246246/57297/1/ntu-94-R91943078-1.pdf