Parallel global elimination algorithm and architecture design for fast block matching motion estimation

Dept. of Electr. Eng., National Taiwan Univ.Huang, Yu-WenYu-WenHuangTsai, Chen-HanChen-HanTsaiLIANG-GEE CHEN2007-04-192018-07-062007-04-192018-07-062004-05http://ntur.lib.ntu.edu.tw//handle/246246/200704191002767application/pdf322446 bytesapplication/pdfen-USParallel global elimination algorithm and architecture design for fast block matching motion estimationjournal article10.1109/ICASSP.2004.1327070http://ntur.lib.ntu.edu.tw/bitstream/246246/200704191002767/1/01327070.pdf