陳怡然臺灣大學：電子工程學研究所楊永賢Yang, Yong-SianYong-SianYang2007-11-272018-07-102007-11-272018-07-102007http://ntur.lib.ntu.edu.tw//handle/246246/57486　　這篇論文提出一個以標準CMOS 0.18 um製程所製作的寬頻低雜訊放大器。我們在一個典型疊接共源極及共閘極放大器的疊接放大器中，在其共閘極放大器的閘極端加上一個電感以擴展它的頻寬。類似於shunt-peaking的方式，我們可以發現在加上一個閘極電感之後會引入零點在轉換函數中。利用這些零點在高頻增加它的功率增益，但是這同時也會因為在共閘極的源極端看入會產生負阻效應而導致不穩定的情形發生。為了讓這個放大器可以穩定且擴展頻寬，我們利用主動式電感的電感值可以變動的特性(藉由設計它的自振頻率)，並且讓他的自振頻率低於Lg-Cgs2的共振頻率來避免放大器震盪的發生。這個方式可以擴展頻寬提供一個很平坦的功率增益到高頻的部份並且可以避免放大器震盪的情形。再者，傳統設計LNA的方法免不了需要使用到被動式電感來做阻抗及雜訊匹配。在晶片上使用的被動式電感的Q值並不好而且會佔用到太多的面積。而在這次的設計中，我們使用了具有回授電阻的主動式電感以增加它的電感值與Ｑ值。最後應用這個寬頻放大器到熱雜訊消除技術架構來設計達到低雜訊與阻抗匹配。 此應用頻寬擴展技術的CMOS寬頻低雜訊放大器可量測到50到900 MHz的頻帶中上下變動不到0.4 dB的平坦功率增益和40到1200 MHz的3dB頻寬。並量測到S21約為16.4 dB以及低於3 dB的雜訊指數，並在1.8伏特的供應電壓下消耗8毫安培的電流。S11與S22皆低於-10 dB以下並且量測到IIP3約為-1 dBm。 中文關鍵字：寬頻低雜訊放大器、頻寬擴展技術、主動式電感、熱雜訊消除技術。In this paper, a wideband LNA implemented in a 0.18μm standard CMOS process is presented. We modified the cascode amplifier which is typically composed of common-source and common-gate amplifiers and improve the bandwidth by adding the active inductor to the gate of common-gate stage. It can be found that a series gate inductor to a common-gate amplifier introduces zeros into the transfer function of the modified cascode amplifier, just like shunt-peaking method. The bandwidth of the modified cascode amplifier can be compensated because of the zeros introduced to high frequency, but it also results in the unstable problem because of the negative resistance looking into the source of the common gate around the resonant frequency of , as shown in Fig. 3.11. To keep the amplifier stable and extend bandwidth, we use the variable inductance of active inductor, as Lg, which can be designed to keep the self-resonant frequency of the active inductor below the resonant frequency of . This method can provide very flat power gain at high frequency to extend the bandwidth and also avoid the negative resistance causing the amplifier unstable. And the regular methods to design LNA will require inductors for the impedance and noise matching. On-chip passive inductors exhibit poor quality-factor and require large silicon die area. Here, we use the active inductor with resistance feedback which can achieve higher inductance and quality-factor at GHz range, shown in Fig. 4.12. Following up this idea, it is used to design a wideband low noise amplifier by using thermal noise canceling technique. Finally, we applied this modified cascode amplifier to the thermal noise canceling structure to achieve low noise figure and impedance matching. This CMOS wideband low noise amplifier using bandwidth extension technique can achieve a measured flat bandwidth (±0.4 dB) from 50 MHz to 900 MHz and 3-dB bandwidth from 40 to 1200 MHz. The wideband LNA provides a very flat power gain (S21) about 16.4 dB with a noise figure less than 3 dB while drawing 8 mA from a 1.8 V supply. Both the S11 and S22 are below -10 dB, and the IIP3 is measured about -1 dBm.Chapter 1 Introduction………………………………………………1 1.1 Motivation…………………………………………………………1 1.2 Introduction of Wideband LNA…………………………………4 1.3 Thesis Organization……………………………………………5 Chapter 2 Basic RF ICs Concepts…………………………………8 2.1 Basic Concepts in RF ICs Design……………………………8 2.1.1 S-parameters………………………………………………9 2.1.2 Stability…………………………………………………11 2.1.3 Linearity…………………………………………………13 2.2 Noise Analysis…………………………………………………19 2.2.1 Noise Types………………………………………………20 2.2.2 Noise Model for Circuit Elements……………………23 2.2.3 Input-referred Noise……………………………………28 2.2.4 Noise Figure………………………………………………32 Chapter 3 Bandwidth Extension Techniques……………………32 3.1 Bandwidth Extension Techniques………………………32 3.1.1 Zeros as Bandwidth Enhancers…………………32 3.1.2 Bandwidth Enhancement with Doublers………35 3.1.3 Stagger-tuning Method……………………………38 3.1.4 Active-matching……………………………………39 3.1.5 Distributed Amplifier……………………………41 3.1.6 Feedback Topology…………………………………42 3.2 Poles and Zeros Theory for Circuits Designs……43 3.2.1 Analyzing Frequency Response by Poles and Zeros Theory…………………………………………………………………43 3.2.2 Poles and Zeros Theory for S-parameters Estimation……………………………………………………………45 3.3 Modified Cascode Architecture………………………50 Chapter 4 Basic Concepts of CMOS Inductor……………………58 4.1 Introducing to Passive Inductor Design in CMOS Process…………………………………………………………………58 4.1.1 Basic Concepts of CMOS RF Passive Inductors59 4.1.2 Quality Factor of CMOS RF Passive Inductors61 4.1.3 Some Special Structures for High Performance Passive Inductor Design……………………………………………62 4.2 Introducing to Active Inductors……………………65 4.2.1 Basic Theory of Active Inductors……………66 4.2.2 Compensation Methodologies of High Quality Factor Active Inductors……………………………………………73 4.3 Noise Analyses of Active Inductor …………………79 4.4 Performance Comparison of Passive and Active Inductors………………………………………………………………81 Chapter 5 CMOS Wideband LNA Using Bandwidth Extension Technique………………………………………………………………85 5.1 Design and Realization of Wideband LNA……………85 5.1.1 Thermal Noise Canceling…………………………85 5.1.2 Circuits Design and Realization………………86 5.2 Simulated and Measured Results………………………99 Chapter 6 Conclusion………………………………………………1002855128 bytesapplication/pdfen-US寬頻低雜訊放大器頻寬擴展技術主動式電感熱雜訊消除技術wideband LNAbandwidth extension techniqueactive inductorthermal noise canceling techniquethesishttp://ntur.lib.ntu.edu.tw/bitstream/246246/57486/1/ntu-96-R93943105-1.pdf