Y.-K. TsaiLIANG-HUNG LU2019-10-242019-10-24201715497747https://scholars.lib.ntu.edu.tw/handle/123456789/427892https://www.scopus.com/inward/record.uri?eid=2-s2.0-85018869456&doi=10.1109%2fTCSII.2016.2581825&partnerID=40&md5=b77360d113089f03437c4950d129e6c6A 51.3-MHz 18-μW 21.8-ppm/°C relaxation oscillator is presented in 90-nm CMOS. The proposed oscillator employs an integrated error feedback and composite resistors to minimize its sensitivity to temperature variations. For a temperature range from -20 °C to 100 °C, the fabricated circuit demonstrates a frequency variation less than ±0.13%, leading to an average frequency drift of 21.8 ppm/°C. As the supply voltage changes from 0.8 to 1.2 V, the frequency variation is ±0.53%. The measured rms jitter and phase noise at 1-MHz offset are 89.27 ps and -83.29 dBc/Hz, respectively. © 2004-2012 IEEE.Integrated error feedback (IEF); low power; relaxation oscillator; temperature compensation[SDGs]SDG7CMOS integrated circuits; Error compensation; Feedback; Phase noise; Sensitivity analysis; Temperature distribution; Average frequency; CMOS relaxation oscillators; Frequency variation; Integrated errors; Low Power; Sensitivity to temperatures; Temperature compensation; Temperature range; Relaxation oscillatorsjournal article10.1109/TCSII.2016.25818252-s2.0-85018869456