臺灣大學: 電子工程學研究所張耀文徐子軒Hsu, Tzu-HsuanTzu-HsuanHsu2013-04-102018-07-102013-04-102018-07-102012http://ntur.lib.ntu.edu.tw//handle/246246/256709溫度會影響時脈訊號的延遲時間。如果不考慮溫度效應,時脈偏移量可能大幅增加,以至於降低晶片運作效能。現有大多數考慮溫度效應的時脈樹合成方法,均存在兩個主要缺點。其一是對事先建構的時脈樹進行考慮溫度的後最佳化處理,由於時脈樹結構在後最佳化過程中維持不變,因而大幅限縮最佳化的解空間。另一缺點是沒有考慮時脈樹自身產生的熱。然而時脈樹本身往往消耗大量動態功率,產生的熱會造成溫度變化,因此不可忽略。在本論文中,我們提出考慮自身熱效應的緩衝器時脈樹合成流程。透過混合整數線性規劃,我們同時描述熱擴散效應、擺放緩衝器,並決定基於熱效應考量的時脈樹結構。此外為了避免在建立時脈樹的過程中,執行極為耗時的溫度模擬程序,我們提出快速的溫度疊加作法,漸進更新熱剖面資料。最後,為了減少執行時間,我們修改原先的混合整數線性規劃,轉換為連續的、低複雜度的可行性問題。實驗數據顯示,我們提出的方法可降低50.57%最差情況的時脈訊號偏移量;透過我們提出的加速方法,執行時間可減少超過17.29倍。Temperature affects clock signal delays. Without considering temperature effects, clock skew could be significantly increased and chip performance might be accordingly degraded. Most existing temperature-aware clock tree synthesis methods have two major drawbacks. First, since they perform post processes to pre-constructed clock trees, the solution space is often limited. Second, heat generated by a clock tree itself is not considered. As a clock tree consumes substantial dynamic power, the considerable heat generated by itself cannot be ignored. In this thesis, we propose a self-heating-aware buffered clock tree synthesis flow to remedy the drawbacks. A mixed integer linear programming (MILP) formulation is proposed to simultaneously model heat spreading, place buffers, and determine a temperature-aware clock tree topology. In addition, to avoid time-consuming thermal simulations during clock tree construction, a fast superposition approach is proposed to incrementally update thermal profiles. Finally, to reduce runtime, the original MILP formulation is transformed to a succession of low-complexity feasibility problems. Experimental results show that our approach can achieve averagely 50.57% worst-case clock skew reduction. With our proposed speed-up methods, runtime can be further reduced by more than 17.29X.140 bytestext/htmlen-US實體設計時脈樹合成時脈訊號偏移量溫度效應physical designclock tree synthesisclock skewtemperature effect考慮自身熱效應之緩衝器時脈樹合成Self-Heating-Aware Buffered Clock Tree Synthesisthesishttp://ntur.lib.ntu.edu.tw/bitstream/246246/256709/1/index.html