A multi-core sphere decoder VLSI architecture for MIMO communications

CHIA-HSIANG YANGYang, C.-H.C.-H.YangMarković, D.D.MarkovićCHIA-HSIANG YANG2018-09-102018-09-102008http://www.scopus.com/inward/record.url?eid=2-s2.0-67249092866&partnerID=MN8TOARShttp://scholars.lib.ntu.edu.tw/handle/123456789/340939A multi-core sphere decoder VLSI architecture for MIMO communicationsconference paper10.1109/GLOCOM.2008.ECP.633