Embedded JPEG encoder IP core and memory efficient preprocessing architecture for scanner

Dept. of Electr. Eng., National Taiwan Univ.Lian, Chung-JrChung-JrLianChen, Liang-GeeLiang-GeeChenChang, Hao-ChiehHao-ChiehChangChang, Yung-ChiYung-ChiChang2007-04-192018-07-062007-04-192018-07-062000-12http://ntur.lib.ntu.edu.tw//handle/246246/2007041910021415application/pdf400453 bytesapplication/pdfen-USEmbedded JPEG encoder IP core and memory efficient preprocessing architecture for scannerjournal article10.1109/APCCAS.2000.913613http://ntur.lib.ntu.edu.tw/bitstream/246246/2007041910021415/1/00913613.pdf