A Waveform-Based Gatelevel Timing Simulator (BTS) for MOS VLSI Circuits with Considerations of Effects of the Internal Charges

Wang, J. H.J. H.WangChang, M.M.Chang馮武雄Feng, Wu-ShiungWu-ShiungFeng2009-02-042018-07-062009-02-042018-07-061995-05http://ntur.lib.ntu.edu.tw//handle/246246/120416en-USA Waveform-Based Gatelevel Timing Simulator (BTS) for MOS VLSI Circuits with Considerations of Effects of the Internal Chargesjournal article