黃俊郎臺灣大學：電子工程學研究所張欽俞Chang, Chin-YuChin-YuChang2007-11-272018-07-102007-11-272018-07-102004http://ntur.lib.ntu.edu.tw//handle/246246/57689以軟體為測試基礎的微處理器自我測試是一極具低成本的測試方法，它不需要任何為測試加入所額外設計的電路，且其不需外部昂貴的測試儀器亦可完成高速測試。然而此種測試方法仍有許多瓶頸，例如，首先如何產生一有效之測試程式達到較高的缺陷覆蓋率，此外，如何快速合成出一有效的測試程式亦是一大挑戰。 在這篇論文裡我們提出一個以模擬統計的分析方法，首先它依據微處理器使用的指令集產生一連串隨機排列的測試程式，而後讓微處理器執行X-Based Simulation之模擬程式，X-Based Simulation模擬程式之目的是要找出微處理器的指令集與微處理器之各模組之間的關係。根據模擬的結果，會將此結果應用統計的方式，可指引出一串具有較高的可測試性程式，用以偵測微處理器內部之缺陷。此方法在測試微處理機時是在功能模式下進行的，所以它能夠自然地做到速度上(at-speed)的測試，而且不會讓硬體面積增加。在這篇論文裡以一8051之微處理器為應用對象。Software-Based Self-Testing is a very cost efficient test method. There is no DFT overhead and it achieves at-speed testing without expensive ATE test equipment. However, there are still many bottlenecks. For example, how to generate a high fault coverage test programs? On the other hand, How to synthesize an effective assembly test programs very fast? It is also a big challenge In this paper, we propose a statistical simulation-based approach. At first, a random sequence test template set based on the instruction set architecture of processor is generated. Then the processor is asked to execute by an X-Based simulator. The purpose of X-Based simulation is to extract the relationship between instruction set and modules. According to the simulation result, the statistical method is applied. It guides the test template set to detect internal faults with higher testability. In this approach, the processor is applied under normal functional mode so that processor deeply executes at-speed test without DFT overhead. A real case for 8051 microprocessor is implemented in this paper.誌謝 I 中文摘要 II ABSTRACT III TABLE OF CONTENTS IV LIST OF TABLES VI LIST OF FIGURES VII CHAPTER 1 INTRODUCTION 1 1.1 MICROPROCESSOR TESTING CHALLENGES 1 1.2 MICROPROCESSOR TESTING METHODOLOGIES 3 1.3 CONTRIBUTION OF THIS THESIS 4 1.4 THESIS ORGANIZATION 5 CHAPTER 2 BACKGROUND 6 2.1 RELATED WORKS 6 2.1.1 Hierarchical Functional Testing 7 2.1.2 Evolutionary Functional Testing 8 2.2 MOTIVATION 9 CHAPTER 3 BASIC CONCEPT 11 3.1 MICROPROCESSOR MODELING 11 3.2 X-BASED SIMULATION METHOD 14 CHAPTER 4 PROPOSED TESTABILITY ANALYSIS METHODOLOGY 17 4.1 OVERVIEW OF WORK FLOW 17 4.2 X-BASED SIMULATION FLOW 20 4.3 TESTABILITY ANALYSIS 23 CHAPTER 5 CASE STUDY 27 5.1 BENCHMARK 27 5.2 EXPERIMENT RESULTS 30 CHAPTER 6 FUTURE WORK AND CONCLUSIONS 39 CHAPTER 7 REFERENCE 41577305 bytesapplication/pdfen-US軟體自我測試微處理器測試可測性分析Testability AnalysisSoftware-Based Self-TestingMicroprocessor Testingthesishttp://ntur.lib.ntu.edu.tw/bitstream/246246/57689/1/ntu-93-P91943004-1.pdf