Fu K.-LSHEN-IUAN LIU2021-09-022021-09-02202010638210https://www.scopus.com/inward/record.uri?eid=2-s2.0-85087513854&doi=10.1109%2fTVLSI.2020.2991721&partnerID=40&md5=d361dfc31321ff53764ba9f75d9a045chttps://scholars.lib.ntu.edu.tw/handle/123456789/581135We present a 64-Gb/s four-level pulse amplitude modulation (PAM-4) optical receiver with the amplitude/phase correction and the threshold voltage/data level calibration, utilizing an inverter-based transimpedance amplifier (TIA). A variable gain amplifier (VGA) with the amplitude/phase correction is also presented. The threshold voltage of the data slicers and the data levels for the error slicers are calibrated. A three-tap decision feedback equalizer is utilized to compensate for the intersymbol interference. The tap coefficients are calibrated by using the sign-sign least-mean-square algorithm. This PAM-4 optical receiver is fabricated in a 40-nm CMOS process. For the TIA with five VGAs, the measured maximum amplitude imbalance is less than 0.4 dB and the phase imbalance is less than ±1°. Its power is 420 mW from a supply of 1.1 V excluding the output buffers. Its core area is 2.2 mm2. ? 1993-2012 IEEE.Calibration; Decision feedback equalizers; Operational amplifiers; Threshold voltage; Variable gain amplifiers; Voltage regulators; CMOS processs; Core area; Data level; Inverter-based; Least mean square algorithms; Maximum amplitude; Output Buffer; Phase imbalances; Pulse amplitude modulation[SDGs]SDG7A 64-Gb/s PAM-4 Optical Receiver with Amplitude/Phase Correction and Threshold Voltage/Data Level Calibrationjournal article10.1109/TVLSI.2020.29917212-s2.0-85087513854