Tsai, W.-C.W.-C.TsaiLan, Y.-C.Y.-C.LanChen, S.-J.S.-J.ChenHu, Y.-H.Y.-H.HuSAO-JIE CHEN2018-09-102018-09-102010http://www.scopus.com/inward/record.url?eid=2-s2.0-79960730444&partnerID=MN8TOARShttp://scholars.lib.ntu.edu.tw/handle/123456789/358075A novel hybrid Dynamic Multi-Level (DyML) flow control scheme for Networks-on-Chip is proposed. DyML uses a buffer fluidity flow monitor for real-time monitoring the incoming traffic volume. Instead of buffering as many flits as a router can afford, DyML dynamically adjusts the proper number of buffering flits. Accordingly, DyML causes less in-transit packets in the network, thus improves packet latency and mitigates traffic congestion. Experiments indicated that DyML averagely improves the latency performance of a state-of-the-art routing algorithm (Odd-Even) by 25.43% in synthetic traffics and by 0.90% in real traffics. © 2010 IEEE.[SDGs]SDG9Control schemes; Hybrid dynamics; Incoming traffic; Latency performance; Multi-level; Networks on chips; Packet latencies; Real time monitoring; Real traffic; Flow control; Microprocessor chips; Programmable logic controllers; Traffic congestionDyML: Dynamic Multi-Level flow control for Networks on Chipconference paper10.1109/SOCC.2010.5784670