Optimization of a saddle-like FinFET by device simulation for sub-50nm DRAM application

CHEE-WEE LIUChang, H.-C.H.-C.ChangKuo, P.-S.P.-S.KuoPeng, C.-Y.C.-Y.PengChen, Y.-T.Y.-T.ChenChen, W.-Y.W.-Y.ChenCHEE-WEE LIU2018-09-102018-09-102009http://www.scopus.com/inward/record.url?eid=2-s2.0-77949374210&partnerID=MN8TOARShttp://scholars.lib.ntu.edu.tw/handle/123456789/350479Optimization of a saddle-like FinFET by device simulation for sub-50nm DRAM applicationconference paper10.1109/ISDRS.2009.5378015