Chen, K.-H.K.-H.ChenLu, J.-H.J.-H.LuChen, B.-J.B.-J.ChenSHEN-IUAN LIU2020-06-112020-06-11200715497747https://scholars.lib.ntu.edu.tw/handle/123456789/499879https://www.scopus.com/inward/record.uri?eid=2-s2.0-34147125806&doi=10.1109%2fTCSII.2006.886880&partnerID=40&md5=efb3df9ab3dc719e3709ba1391fd3afdA two-stage ultra-wide-band CMOS low-noise amplifier (LNA) is presented. With the common-gate configuration employed as the input stage, the broad-band input matching is obtained and the noise does not rise rapidly at higher frequency. By combining the common-gate and common-source stages, the broad-band characteristic and small area are achieved by using two inductors. This LNA has been fabricated in a 0.18-μm CMOS process. The measured power gain is 11.2-12.4 dB and noise figure is 4.4-6.5 dB with — 3-dB bandwidth of 0.4-10 GHz. The measured IIP3 is —6 dBm at 6 GHz. It consumes 12 mW from a 1.8-V supply voltage and occupies only 0.42 mm2. © 2007, IEEE. All rights reserved.Common-gate configuration; ultra-wide-band (UWB) CMOS low-noise amplifier (LNA)[SDGs]SDG7Broadband networks; CMOS integrated circuits; Spurious signal noise; Common-gate configuration; Low noise amplifiersAn ultra-wide-band 0.4-10-GHz LNA in 0.18-μm CMOSjournal article10.1109/TCSII.2006.8868802-s2.0-34147125806