Chein-Lung ChenWei-Jen HuangSHEN-IUAN LIU2018-09-102018-09-102007-0700135194http://scholars.lib.ntu.edu.tw/handle/123456789/333720https://www.scopus.com/inward/record.uri?eid=2-s2.0-34547621250&doi=10.1049%2fel%3a20071063&partnerID=40&md5=2f3388372f2c0fe6882a4a395b9c35e2The output capacitor and its equivalent series resistance (ESR) often limit the stability of a conventional low dropout regulator (LDR). A CMOS LDR with dynamic zero compensation is presented to tolerate the wide range of the output capacitor and the ESR. The stability constraints for the output capacitor with the ESR are derived. The measured LDR is stable for the output capacitor 2nF-47uF with ESR of 0.1-50Ω. The maximum quiescent current of this LDR with a bandgap reference is 43.2uA and its maximum output current is 150mA for the output voltage of 1.8V. © The Institution of Engineering and Technology 2007.Capacitors; CMOS integrated circuits; Electric resistance; Energy gap; Dynamic zero compensation; Equivalent series resistance (ESR); Low dropout regulator (LDR); Stability constraints; Electric current regulatorsA CMOS low dropout regulator with dynamic zero compensationjournal article10.1049/el:200710632-s2.0-34547621250WOS:000248733700009