An Independent Dual Frequency-Phase-Locked Loop VLSI Architecture for SONET OC-3

汪重光Lee, R. B.R. B.LeeJ. LinWang, C. K.C. K.Wang2009-04-272018-07-102009-04-272018-07-101996-05http://ntur.lib.ntu.edu.tw//handle/246246/153875en-USAn Independent Dual Frequency-Phase-Locked Loop VLSI Architecture for SONET OC-3journal article