An Optimization-based Multiple-Voltage Scaling Technique for Low Power CMOS Digital Design

Y. J. YehSY-YEN KUO2018-09-102018-09-102002-10http://scholars.lib.ntu.edu.tw/handle/123456789/299126[SDGs]SDG7An Optimization-based Multiple-Voltage Scaling Technique for Low Power CMOS Digital Designjournal article10.1142/S02181266020005132-s2.0-0347934780WOS:000179292600005