Chang, Chih YaoChih YaoChangShen, Yao LuenYao LuenShenTang, Shun WeiShun WeiTangWu, Tian LiTian LiWuKuo, Wei HungWei HungKuoLin, Suh FangSuh FangLinYUH-RENN WUHuang, Chih FangChih FangHuang2023-07-172023-07-172022-11-0118820778https://scholars.lib.ntu.edu.tw/handle/123456789/633728In this study, a 10 nm u-GaN etching buffer layer was designed and inserted into the standard p-GaN/AlGaN/GaN high electron mobility transistor structure to improve the p-GaN etching process. The experimental result shows that the device with the u-GaN layer can avoid the over-etched issue, further improving the uniformity of the etching profile and the ON-resistance of the devices. The simulation result indicates that the drain current would slightly increase due to reduced conduction band raising when the u-GaN layer is inserted. In sum, the process uniformity can improve when the u-GaN layer is inserted and in the meantime, excellent device characteristics are maintained.GaN | high electron mobility transistor (HEMT) | p-GaN etching[SDGs]SDG7Process improvement of p-GaN HEMTs with a u-GaN etching buffer layer insertedjournal article10.35848/1882-0786/ac9c452-s2.0-85141917546https://api.elsevier.com/content/abstract/scopus_id/85141917546