臺灣大學: 電子工程學研究所汪重光朱書緯Chu, Shu-WeiShu-WeiChu2013-04-102018-07-102013-04-102018-07-102012http://ntur.lib.ntu.edu.tw//handle/246246/256751隨著CMOS製程的蓬勃發展，近年來於CMOS毫米波電路與系統的研究愈來愈受到重視。其中W頻段位於75-110 GHz，其應用包含車用雷達系統、大樓間點對點通訊系統與被動式映像系統等等。其中近年來77-81 GHz此頻率範圍已經指定給短距離車用雷達使用。然而因系統嚴苛的規格與要求，目前此雷達系統主要還是以GaAs製程實現，因此，如何以低成本的CMOS製程實現高效能車用雷達系統為一非常困難的挑戰。本論文將提出電路技巧減緩CMOS製程缺點所造成的障礙，同時以實際晶片量測結果加以驗證。 本論文第二章討論此短距離車用雷達系統以FMCW雷達系統去實現的理論與推導，進一步推導出應用於此系統之頻率合成器之規格與要求，同時以Matlab軟體去加以模擬與驗證。 第三章則是提出一個具寬鎖定範圍且操作在低功耗下的注入式鎖定除二除頻器。此電路採用90奈米CMOS製程實現並運用電流重覆使用之前置放大器技巧來增加鎖定範圍，且不需消耗額外功率。經由實際量測，此電路具有12.6 GHz的鎖定範圍，並且功率僅消耗2.33 mW。 第四章提出一個具寬調諧範圍且操作在低功耗下的倍頻電壓控制振盪器。此電路採用90奈米CMOS製程實現並運用全波整流及分離式諧振腔的技巧去提升二倍頻大小及增加調諧範圍。經由實際量測，此電路具有2.77 GHz的調諧範圍，相位雜訊為-104.2 dBc/Hz @ 10 MHz，並且功率僅消耗2.66 mW。 第五章提出一個具負轉導提升技巧之電壓控制振盪器。此電路採用90奈米CMOS製程實現並運用負轉導提升技巧去降低操作功率及提升調諧範圍。經由實際量測，此電路具有1.14 GHz的調諧範圍且功率消耗4.6 mW，相位雜訊為-88.2 dBc/Hz @ 10 MHz。其中模擬與量測間的不一致性會經由詳細的分析及討論，並藉由模擬再次驗證。With the continuous development of CMOS process, the researches for millimeter-wave circuits and systems have become more and more attractive recently. The W-band lies in the frequency bands from 75 to 110 GHz, and applications within W-band include the automotive radar systems, point-to-point communication systems, passive image sensor and so on. At present day, the frequency band from 77 to 81 GHz is assigned to automotive short-range-radar system application. However, because of severe specifications and requirements, so far this radar system is mainly implemented by GaAs process; therefore, how to realize a high performance automotive radar system in low-cost CMOS process is a very difficult challenge. This thesis will present various circuit techniques to alleviate the difficulties from CMOS process, and meanwhile, the functionality will be justified by practical chip measurement results. Chapter 2 discusses the theory and derivation of this automotive short-range-radar system realizing in the FMCW radar system; furthermore, the specifications and requirements of the frequency synthesizer are derived. Then the Matlab simulation is used to justify the functionality of this frequency synthesizer. Chapter 3 proposes a divide-by-two injection-locked frequency divider with wide locking range and low power operation. This circuit is fabricated in 90 nm CMOS process and uses the current-reuse pre-amplifier technique to extend the locking range without any extra power consumption. The circuit has a measured 12.6 GHz locking range and only consumes 2.33 mW. Chapter 4 proposes a push-push VCO with wide tuning range and low power operation. This chip is fabricated in 90 nm CMOS process and uses the full-wave rectification and distributed-LC-tank techniques to enhance the 2nd harmonic swing and increase the frequency tuning range. This circuit has a measured 2.77 GHz tuning range, and measured phase noise is -104.2 dBc/Hz @ 10 MHz while power consumption is only 2.66 mW. Chapter 5 proposes a fundamental VCO with negative-gm-boosted technique. This circuit is fabricated in 90 nm CMOS process and uses the negative-gm-boosted technique to lower the power dissipation and enhance the frequency tuning range. This circuit has measured only 1.14 GHz tuning range and power consumption is 4.6 mW, and measured phase noise is -88.2 dBc/Hz @10 MHz. The inconsistency between simulation and measurement will be analyzed and discussed in detail, and finally the modified simulation is provided to justify the inconsistency.3476056 bytesapplication/pdfen-US注入式鎖定除頻器電壓控制振盪器ILFDVCOthesishttp://ntur.lib.ntu.edu.tw/bitstream/246246/256751/1/ntu-101-R98943132-1.pdf