Hardware architecture design for visual processing: present and future

DSP/IC Design Lab., National Taiwan Univ.Tseng, Po-ChihPo-ChihTsengChen, Liang-GeeLiang-GeeChen2007-04-192018-07-062007-04-192018-07-062004-08http://ntur.lib.ntu.edu.tw//handle/246246/200704191002724application/pdf332542 bytesapplication/pdfen-USHardware architecture design for visual processing: present and futurejournal article10.1109/APASIC.2004.1349388http://ntur.lib.ntu.edu.tw/bitstream/246246/200704191002724/1/01349388.pdf