國立臺灣大學電子工程學研究所張耀文2006-07-262018-07-102006-07-262018-07-102004-07-31http://ntur.lib.ntu.edu.tw//handle/246246/20009http://ntur.lib.ntu.edu.tw/bitstream/246246/20009/1/922215E002018.pdf動態可重組程式閘陣列(DRFPGAs)被利用來 處理具有高度複雜性和功能的設計，因其可利用時 間共享(time-sharing)方式來增進邏輯效能。在這 篇報告中，我們用3D-box 表示每一個任務(task) 來處理因為動態可重組程式閘陣列而產生的3 維平 面規劃和擺置(floorplanning/placement)。我們 提出一個新的以樹狀結構為基礎(tree-based)的 表示法-時序樹(T-tree)。每一個結點(node)至多 有三個子結點來表示任務中空間和時間的關係。我 們提出一個有效的求解方法並導出要滿足任何因 動態可重組程式閘陣列執行而產生的時間順序限 制所需的條件。實驗結果顯示跟現今最頂尖的表示 法相比，我們以樹狀結構為基礎的表示法可以在較 少的時間中得到非常好的解。Improving logic capacity by time-sharing, dynamically reconfigurable FPGAs are employed to handle designs of high complexity and functionality. In this report, we model each task as a 3D-box and deal with the temporal floorplanning/placement problem for dynamically reconfigurable FPGA architectures. We present a tree-based formulation, called T-tree, to represent the spatial and temporal relations among tasks. Each node in a T-tree has at most three children which represent the dimensional relationship among tasks. We present an efficient packing method and derive the condition to ensure the satisfaction of precedence constraints which model the temporal ordering among tasks induced by the execution of dynamically reconfigurable FPGAs. Experimental results show that our tree-based formulation can achieve significantly better solution quality with less execution time than the most recent state-of-the-art work.application/pdf134045 bytesapplication/pdfzh-TW國立臺灣大學電子工程學研究所reconfigurable systemreconfigurable computingphysical design3D floorplanning可重組化系統可重組化計算實體設計三 維平面規劃reporthttp://ntur.lib.ntu.edu.tw/bitstream/246246/20009/1/922215E002018.pdf