施吉昇Shih, Chi-Sheng臺灣大學:資訊工程學研究所林毓賢Lin, Yu-HsienYu-HsienLin2010-05-182018-07-052010-05-182018-07-052008U0001-1108200816395800http://ntur.lib.ntu.edu.tw//handle/246246/183617在多核心架構的系統中，核心間行程通訊是個重要的議題，一個效率不好的通訊定設計將造成系統效能下降。本篇研究針對基於異質多核心單晶片系統平台的媒體串流應用，提出一個有效率的核心間行程通訊協定，此協定使用三個特殊計的機制，達成非同步及無緩衝的通訊，並藉由移除中斷機制及減少記憶體複的操作來提升效能。由傳輸不同資料量的實驗可得知，所提出的協定中的"傳"動作只需小量的常數時間，而"接收"動作亦優於傳統行程間通訊協定，且差隨著資料量越大而增加；而由H.264 編碼應用的模擬結果可知，相較於傳統行間通訊協定，所提出的協定使得效能有大約40%的提升。Inter-core communication is an important issue need to be addressed in multi-core architectures. An inefficient communication design will lead to performance degradation. In this thesis, we target on multimedia streaming application on heterogeneous multi-core SoCs and design an efficient inter-core process communication (ICPC) protocol. It is an asynchronous and un-buffer protocol which using three special designed mechanisms including ``Mail Sending'', ``Express Transmission'' and ``Double Output Buffer''. With these mechanisms, we enhance the performance by eliminating the need of using interrupt and reducing unnecessary memory copies. We evaluate the impact to the communication overhead for different size of data transmission. The results show that the ``send'' operation in our protocol only takes a small constant time. The ``receive'' operation also outperforms to traditional IPC and the gap will increase according to the size of data transmission. We also evaluate the ICPC performance by simulating a real world application, H.264 encoding. When comparing to traditional IPC, the results show that we get about 40\% improvements in performance.List of Tables.......................................viiiist of Figures.......................................xist of Algorithms....................................xihapter 1 Introduction.................................1.1 Motivation....................................1.2 Objective and Contribution..........................4.3 Organization...................................5hapter 2 Background and Formal Model.....................7.1 Multi-Core System-On-Chip Platform....................7.2 Operating System on Multi-Core Platform..................8.3 Monolithic Kernel vs.Micro Kernel......................10.4 RelatedWork..................................13.5 Problem Definition...............................15.5.1 Target Application...........................17.5.2 Platform Assumption.........................17.5.3 Inter-Core Process Communication (ICPC) protocol........18hapter 3 System Architecture............................19.1 Hardware Platform...............................19.1.1 ARM Subsystem............................21.1.2 DSP Subsystem.............................23.2 Operating System................................25.2.1 Operating System on ARM Core - OKL4..............25.2.2 Operating System on DSP Core - DSP/BIOS............26hapter 4 Inter-Core Process Communication Protocol Design.........28.1 Communication in Multimedia Applications................28.2 Observation of Communication Overhead..................31.3 Inter-Cores Process Communication Protocol................31.4 Cache Coherency Analysis...........................40.5 Comparison with traditional IPC protocol..................42hapter 5 Implementation of ICPC Service Module...............45.1 ICPC service overview.............................45.2 The Features of the ICPC Service Module..................46.3 ICPC Service Module Architecture......................48.3.1 An Easy Porting Software Architecture...............48.3.2 Porting Layer..............................49.3.3 Main Function Layer - IO Buffer Subsystem............50.3.4 Main Function Layer - Mailbox Subsystem.............52.3.5 Protocol Layer..............................54.4 Applicability...................................54.4.1 Supported Software Environment..................54.4.2 Supported Hardware Environment.................55.5 User Scenario..................................57hapter 6 Performance Evaluation...........60.1 Experiment Introduction............................60.2 Experiment Result...............................63hapter 7 Summary..................................75eferences.........................................77application/pdf586928 bytesapplication/pdfen-US核心間行程通訊異質多核心系統效能協定移植性inter-core process communicationheterogeneous multi-core systemperformanceprotocolportabilitythesishttp://ntur.lib.ntu.edu.tw/bitstream/246246/183617/1/ntu-97-R95922068-1.pdf